The F21c has a real time clock register. This register may be read or written by the cpu and is updated by each transition of the external clock input that is used and counted down by the i/o coprocessors. The register has 21 bits and will wrap around after 2M ticks. Software will be required to maintain a multiple word counter and will have to update the upper words of a multiple word counter when the 21 bit rtc counter wraps.
With a 16Mhz clock the 21 rtc counter would wrap 8 times per second. A video interupt service routine can provide serice more than 8 times persecond so that an arbitrary sized rtc can be maintained.